For example, Japanese Patent Application Laid-Open Publication No. 7-129473 (Patent Document 1) describes a data protection device which encrypts and stores an execution program of a computer in an external storage device, and executes the program while decrypting the same. In this data protection device, for example, an address space of the external storage device is divided for each four addresses for the encryption. The encrypted data whose low two bits of the address are “11” is created by using the previous encrypted data whose low two bits are “10”. Similarly, the encrypted data of “10” and “01” are created by using the encrypted data of “01” and “00”, respectively, and the encrypted data of “00” is created by using an initial value. Then, when the data column whose low two bits of the address are “10” is executed in response to a branch instruction, the decryption is sequentially performed from its two-previous encrypted data of “00”, and wait is performed until reaching the encrypted data of “10”.
Also, Japanese Patent Application Laid-Open Publication No. 2005-18434 (Patent Document 2) describes a microprocessor in which the pipeline process for executing a received encrypted instruction while decrypting the same can be performed with suppressing the generation of stall. Specifically, the two-stage pipeline is provided in the instruction fetch unit, and the instruction fetch is performed on the former stage and the decryption of the encrypted instruction is performed on the latter stage.